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? semiconductor components industries, llc, 2000 july, 2000 rev. 1 1 publication order number: mc26LS30/d mc26LS30 dual differential (eia-422-a)/ quad single-ended (eia-423-a) line drivers the mc26LS30 is a low power schottky set of line drivers which can be configured as two differential drivers which comply with eia422a standards, or as four singleended drivers which comply with eia423a standards. a mode select pin and appropriate choice of power supplies determine the mode. each driver can source and sink currents in excess of 50 ma. in the differential mode (eia422a), the drivers can be used up to 10 mbaud. a disable pin for each driver permits setting the outputs into a high impedance mode within a +10 v common mode range. in the singleended mode (eia423a), each driver has a slew rate control pin which permits setting the slew rate of the output signal so as to comply with eia423a and fcc requirements and to reduce crosstalk. when operated from symmetrical supplies (+5.0 v), the outputs exhibit zero imbalance the mc26LS30 is available in a 16pin surface mount package. operating temperature range is 40 to +85 c. ? operates as two differential eia422a drivers, or four singleended eia423a drivers ? high impedance outputs in differential mode ? short circuit current limit in both source and sink modes ? 10 v common mode range on high impedance outputs ? 15 v range on inputs ? low current pnp inputs compatible with ttl, cmos, and mos outputs ? individual output slew rate control in singleended mode ? replacement for the amd am26LS30 and national semiconductor ds3691 representative block diagrams singleended mode eia423a differential mode eia422a enable cd enable ab out d out c out b out a v cc -1 v ee -8 input d input a input a sr-a out a gnd-5 mode-4 sr-b sr-c out d sr-d out c out b input b input c input d http://onsemi.com device package shipping ordering information mc26LS30d 48 units/rail so16 pin connections 16 1 4 2 5 6 7 8 9 3 10 11 12 13 14 15 input c/ enable cd (top view) sr-a output a output b input d v ee sr-d output d output c sr-c sr-b gnd v cc input a mode input b/ enable ab so16 d suffix case 751b 16 1 1 16 mc26LS30d awlyww marking diagram a = assembly location wl, l = wafer lot yy, y = year ww, w = work week mc26LS30dr2 2500 tape & reel so16
mc26LS30 http://onsemi.com 2 maximum operating conditions (pin numbers refer to so16 package only.) rating symbol value unit power supply voltage v cc v ee 0.5, +7.0 7.0, +0.5 vdc input voltage (all inputs) v in 0.5, +20 vdc applied output voltage when in high impedance mode (v cc = 5.0 v, pin 4 = logic 0, pins 3, 6 = logic 1) v za 15 vdc output voltage with v cc , v ee = 0 v v zb 15 output current i o self limiting junction temperature t j 65, +150 c devices should not be operated at these limits. the arecommended operating conditionso table provides conditions for actual dev ice operation. recommended operating conditions rating symbol min typ max unit power supply voltage (differential mode) v cc v ee +4.75 0.5 5.0 0 +5.25 +0.3 vdc power supply voltage (singleended mode) v cc v ee +4.75 5.25 +5.0 5.0 +5.25 4.75 input voltage (all inputs) v in 0 +15 vdc applied output voltage (when in high impedance mode) v za 10 +10 applied output voltage, v cc = 0 v zb 10 +10 output current i o 65 +65 ma operating ambient temperature (see text) t a 40 +85 c all limits are not necessarily functional concurrently.
mc26LS30 http://onsemi.com 3 electrical characteristics (eia422a differential mode, pin 4 0.8 v, 40 c t a 85 c, 4.75 v v cc 5.25 v, v ee = gnd, unless otherwise noted. pin numbers refer to so16 package only.) characteristic symbol min typ max unit output voltage (see figure 1) differential, r l = , v cc = 5.25 v differential, r l = 100 w , v cc = 4.75 v change in differential voltage, r l = 100 w (note 4.) offset voltage, r l = 100 w change in offset voltage*, r l = 100 w ? v od1 ? ? v od2 ? ? d v od2 ? v os ? d v os ? 2.0 4.2 2.6 10 2.5 10 6.0 400 3.0 400 vdc vdc mvdc vdc mvdc output current (each output) power off leakage, v cc = 0, 10 v v o +10 v high impedance mode, v cc = 5.25 v, 10 v v o +10 v short circuit current (note 2.) high output shorted to pin 5 (t a = 25 c) high output shorted to pin 5 (40 c t a +85 c) low output shorted to +6.0 v (t a = 25 c) low output shorted to +6.0 v (40 c t a +85 c) i olk i oz i sc i sc i sc+ i sc+ 100 100 150 150 60 50 0 0 95 75 +100 +100 60 50 150 150 m a ma inputs low level voltage high level voltage current @ v in = 2.4 v current @ v in = 15 v current @ v in = 0.4 v current, 0 v in 15 v, v cc = 0 clamp voltage (i in = 12 ma) v il v ih i ih i ihh i il i ix v ik 2.0 200 1.5 0 0 8.0 0 0.8 40 100 vdc vdc m a vdc power supply current (v cc = +5.25 v, outputs open) (0 enable v cc ) i cc 16 30 ma timing characteristics (eia422a differential mode, pin 4 0.8 v, t a = 25 c, v cc = 5.0 v, v ee = gnd, (notes 1. and 3.) unless otherwise noted.) characteristic symbol min typ max unit differential output rise time (figure 3) t r 70 200 ns differential output fall time (figure 3) t f 70 200 ns propagation delay time input to differential output input low to high (figure 3) input high to low (figure 3) t pdh t pdl 90 90 200 200 ns skew timing (figure 3) ? t pdh to t pdl ? for each driver max to min t pdh within a package max to min t pdl within a package t sk1 t sk2 t sk3 9.0 2.0 2.0 ns enable timing (figure 4) enable to active high differential output enable to active low differential output enable to 3state output from active high enable to 3state output from active low t pzh t pzl t phz t plz 150 190 80 110 300 350 350 300 ns 1. all voltages measured with respect to pin 5. 2. only one output shorted at a time, for not more than 1 second. 3. typical values established at +25 c, v cc = +5.0 v, v ee = 5.0 v. 4. v in switched from 0.8 to 2.0 v. 5. imbalance is the difference between ? v o2 ? with v in 0.8 v and ? v o2 ? with v in 2.0 v.
mc26LS30 http://onsemi.com 4 electrical characteristics (eia423a singleended mode, pin 4 2.0 v, 40 c t a 85 c, 4.75 v ? v cc ? , |v ee ? 5.25 v, (notes 1. and 3.) unless otherwise noted). characteristic symbol min typ max unit output voltage (v cc = ? v ee ? = 4.75 v) singleended voltage, r l = (figure 2) singleended voltage, r l = 450 w , (figure 2) voltage imbalance (note 5.), r l = 450 w ? v o1 ? ? v o2 ? ? d v o2 ? 4.0 3.6 4.2 3.95 0.05 6.0 6.0 0.4 vdc slew control current (pins 16, 13, 12, 9) i slew 120 m a output current (each output) power off leakage, v cc = v ee = 0, 6.0 v v o +6.0 v short circuit current (output short to ground, note 2.) v in 0.8 v (t a = 25 c) v in 0.8 v (40 c t a +85 c) v in 2.0 v (t a = 25 c) v in 2.0 v (40 c t a +85 c) i olk i sc+ i sc+ i sc i sc 100 60 50 150 150 0 80 95 +100 150 150 60 50 m a ma inputs low level voltage high level voltage current @ v in = 2.4 v current @ v in = 15 v current @ v in = 0.4 v current, 0 v in 15 v, v cc = 0 clamp voltage (i in = 12 ma) v il v ih i ih i ihh i il i ix v ik 2.0 200 1.5 0 0 8.0 0 0.8 40 100 vdc vdc m a vdc power supply current (outputs open) v cc = +5.25 v, v ee = 5.25 v, v in = 0.4 v i cc i ee 22 17 8.0 30 ma timing characteristics (eia423a singleended mode, pin 4 2.0 v, t a = 25 c, v cc = 5.0 v, v ee = 5.0 v, (notes 1. and 3.) unless otherwise noted.) characteristic symbol min typ max unit output timing (figure 5) output rise time, c c = 0 output fall time, c c = 0 output rise time, c c = 50 pf output fall time, c c = 50 pf t r t f t r t f 65 65 3.0 3.0 300 300 ns m s rise time coefficient (figure 16) c rt 0.06 m s/pf propagation delay time, input to single ended output (figure 5) input low to high, c c = 0 input high to low, c c = 0 t pdh t pdl 100 100 300 300 ns skew timing, c c = 0 (figure 5) ? t pdh to t pdl ? for each driver max to min t pdh within a package max to min t pdl within a package t sk4 t sk5 t sk6 15 2.0 5.0 ns 1. all voltages measured with respect to pin 5. 2. only one output shorted at a time, for not more than 1 second. 3. typical values established at +25 c, v cc = +5.0 v, v ee = 5.0 v. 4. v in switched from 0.8 to 2.0 v. 5. imbalance is the difference between ? v o2 ? with v in 0.8 v and ? v o2 ? with v in 2.0 v.
mc26LS30 http://onsemi.com 5 table 1 inputs outputs operation v cc v ee mode a b c d a b c d differential +5.0 gnd 0 0 0 0 0 0 1 1 0 differential (eia422a) +5 . 0 gnd 0 0 0 1 0 0 0 0 0 1 0 1 1 0 1 0 0 1 (eia 422 a) 0 0 1 x 0 1 0 0 1 1 1 z 0 z 0 0 1 1 0 0 x 1 1 0 0 0 1 0 z 1 z 0 0 1 1 0 0 0 1 0 0 0 0 0 0 1 1 0 0 1 1 0 0 1 0 0 0 1 0 0 0 1 1 x 0 1 1 0 0 z 1 z singleended +5.0 5.0 1 0 0 0 0 0 0 0 0 s g e ded (eia423a) 50 50 1 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 (eia 423 a) 1 1 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 0 1 1 0 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 1 1 0 0 0 0 1 0 0 1 0 0 0 0 1 0 0 1 x 0 x x x x x x z z z z x = don't care z = high impedance (off) figure 1. differential output test figure 2. singleended output test v ee mode = 0 v os r l r l /2 r l /2 c l v in (0.8 or 2.0 v) v cc v o v cc v od2 mode = 1 v in (0.8 or 2.0 v) figure 3. differential mode rise / fall time and data propagation delay notes: 1. s.g. set to: f 1.0 mhz; duty cycle = 50%; t r , t f , 10 ns. 2. t sk1 = ? t pdh t pdl ? for each driver. 3. t sk2 computed by subtracting the shortest t pdh from the longest t pdh of the 2 drivers within a package. 4. t sk3 computed by subtracting the shortest t pdl from the longest t pdl of the 2 drivers within a package. 10% t pdh 1.5 v v in 0 v 10% 50% 90% t f t pdl t r 90% 50% v out 1.5 v +3.0 v v cc v in s.g. v od 500 pf 100
mc26LS30 http://onsemi.com 6 figure 4. differential mode enable timing notes: 1. s.g. set to: f 1.0 mhz; duty cycle = 50%; t r , t f , 10 ns. 2. above tests conducted by monitoring output current levels. figure 5. singleended mode rise / fall time and data propagation delay notes: 1. s.g. set to: f 100 khz; duty cycle = 50%; t r , t f , 10 ns. 2. t sk4 = ? t pdh t pdl ? for each driver. 3. t sk5 computed by subtracting the shortest t pdh from the longest t pdh of the 4 drivers within a package. 4. t sk6 computed by subtracting the shortest t pdl from the longest t pdl of the 4 drivers within a package. v ee t pzh t pzl t plz t phz 1.5 v output current (v in = lo) 0.1 v ss /r l 0.1 v ss /r l v ss /r l v ss /r l 0.5 v ss /r l 0.5 v ss /r l r l 0 or 3.0 v en v ss 500 pf 450 w s.g. v cc 450 c c +3.0 v 1.5 v 0 v v in v cc v in +2.5 v s.g. 500 pf v o (v in = hi) vin 1.5 v v out 10% 50% 90% t r 1.5 v 90% 0 v 10% v in 50% t f t pdl t pdh
mc26LS30 http://onsemi.com 7 v od single-ended mode mode = 1 v cc = 5.0 v, v ee = -5.0 v v in = 1 4.0 0 3.5 4.5 i oh , output current (ma) -60 -40 -30 -50 -20 -10 3.0 v oh , output voltage (v) -4.75 0 -3.25 -3.75 60 50 40 30 -4.25 20 10 i ol , output current (ma) single-ended mode mode = 1 v cc = 5.0 v, v ee = -5.0 v v in = 0 v ol , output voltage (v) figure 6. differential output voltage versus load current figure 7. internal bias current versus load current figure 8. short circuit current versus output voltage figure 9. input current versus input voltage figure 10. output voltage versus output source current figure 11. output voltage versus output sink current i o v cc = 5.25 v v za , applied output voltage (v) pins 2 to 4, 6, 7 -5.0 v v ee 0 differential or single-ended mode v cc = 0 +5.0 0 -5.0 -10 -15 -20 -25 15 13 11 9.0 7.0 5.0 3.0 1.0 -1.0 1.0 normally high output +100 +60 +20 -20 -60 -100 6.0 5.0 4.0 3.0 2.0 0 20 40 30 20 120 100 80 60 040 5.0 4.0 3.0 2.0 1.0 0 60 50 40 30 20 10 0 0.8 or 2.0 v i o , output current (ma) 10 v in , input voltage (v) normally low output v cc = 5.0 v differential mode mode = 0, v cc = 5.0 v differential mode mode = 0, v cc = 5.0 v differential mode mode = 0 supply current = bias current + load current total load current (ma) v od , output voltage (v) i b , bias current (ma) i sc , short circuit current (ma) i in input current a) (pin numbers refer to so16 package only.)
mc26LS30 http://onsemi.com 8 i sc - (ma) i sc + (ma) figure 12. internal positive bias current versus load current figure 13. internal negative bias current versus load current figure 14. short circuit current versus output voltage figure 15. short circuit current versus temperature figure 16. rise/fall time versus capacitance total load current (ma) i ol v in = lov in = hi single ended mode mode = 1 v cc = 5.0 v, v ee = -5.0 v supply current = bias current + i oh -80 i oh -240 0 -160 240 160 80 26 22 18 14 10 i b+ , bias current (ma) total load current (ma) 020 85 single-ended mode mode = 1 v cc = 5.0 v, v ee = -5.0 v supply current = bias current + i ol 0 t a , ambient temperature ( c) 10 c c , capacitance (pf) single or differential mode v cc = 5.0 v, v ee = -5.0 v or gnd single-ended mode mode = 1 v cc = 5.0 v, v ee = -5.0 v 1.0 v in = lov in = hi 50 -40 i ol -80 -240 0 -160 240 160 80 -5.0 -20 -15 -10 i oh normally high output single-ended mode mode = 1 v cc = 5.0 v, v ee = -5.0 v normally low output -100 -20 20 -60 60 100 0 v za , applied output voltage (v) -2.0 -4.0 -6.0 2.0 4.0 6.0 normally low output 10 k 10 100 100 1.0 k 40 -110 110 -100 90 70 60 -20 1.0 k -90 normally high output to ground i b- , bias current (ma) i sc , short circuit current (ma) , rise/fall time ( s) t r m , t f
mc26LS30 http://onsemi.com 9 applications information (pin numbers refer to so16 package only.) description the mc26LS30 is a dual function line driver it can be configured as two differential output drivers which comply with eia422a standard, or as four singleended drivers which comply with eia423a standard. the mode of operation is selected with the mode pin (pin 4) and appropriate power supplies (see table 1). each of the four outputs is capable of sourcing and sinking 60 to 70 ma while providing sufficient voltage to ensure proper data transmission. as differential drivers, data rates to 10 mbaud can be transmitted over a twisted pair for a distance determined by the cable characteristics. eia422a standard provides guidelines for cable length versus data rate. the advantage of a differential (balanced) system over a singleended system is greater noise immunity, common mode rejection, and higher data rates. where extraneous noise sources are not a problem, the mc26LS30 may be configured as four singleended drivers transmitting data rates to 100 kbaud. crosstalk among wires within a cable is controlled by the use of the slew rate control pins on the mc26LS30. mode selection (differential mode) in this mode (pins 4 and 8 at ground), only a +5.0 v supply 5% is required at v cc . pins 2 and 7 are the driver inputs, while pins 10, 11, 14 and 15 are the outputs (see block diagram on page 1). the two outputs of a driver are always complementary and the dif ferential voltage available at each pair of outputs is shown in figure 6 for v cc = 5.0 v. the differential output voltage will vary directly with v cc . a ahigho output can only source current, while a alowo output can only sink current (except for short circuit current see figure 8). the two outputs will be in a high impedance mode when the respective enable input (pin 3 or 6) is high, or if v cc 1.1 v. output leakage current over a common mode range of 10 v is typically less than 1.0 m a. the outputs have short circuit current limiting, typically, less than 100 ma over a voltage range of 0 to +6.0 v (see figure 8). short circuits should not be allowed to last indefinitely as the ic may be damaged. pins 9, 12, 13 and 16 are not normally used when in this mode, and should be left open. (singleended mode) in this mode (pin 4 2.0 v) v cc requires +5.0 v, and v ee requires 5.0 v, both 5.0%. pins 2, 3, 6, and 7 are inputs for the four drivers, and pins 15, 14, 11, and 10 (respectively) are the outputs. the four drivers are independent of each other, and each output will be at a positive or a negative voltage depending on its input state, the load current, and the supply voltage. figures 10 & 11 indicate the high and low output voltages for v cc = 5.0 v, and v ee = 5.0 v. the graph of figure 10 will vary directly with v cc , and the graph of figure 11 will vary directly with v ee . a ahigho output can only source current, while a alowo output can only sink current (except short circuit current see figure 14). the outputs will be in a high impedance mode only if v cc 1.1 v. changing v ee to 0 v does not set the outputs to a high impedance mode. leakage current over a common mode range of 10 v is typically less than 1.0 m a. the outputs have short circuit current limiting, typically less than 100 ma over a voltage range of 6.0 v (see figure 14). short circuits should not be allowed to last indefinitely as the ic may be damaged. capacitors connected between pins 9, 12, 13, and 16 and their respective outputs will provide slew rate limiting of the output transition. figure 16 indicates the required capacitor value to obtain a desired rise or fall time (measured between the 10% and 90% points). the positive and negative transition times will be within 5% of each other. each output may be set to a different slew rate if desired. inputs the five inputs determine the state of the outputs in accordance with table 1. all inputs (regardless of the operating mode) have a nominal threshold of +1.3 v, and their voltage must be kept within a range of 0 v to +15 v for proper operation. if an input is taken more than 0.3 v below ground, excessive currents will flow, and the proper operation of the drivers will be affected. an open pin is equivalent to a logic high, but good design practices dictate that inputs should never be left open. unused inputs should be connected to ground. the characteristics of the inputs are shown in figure 9. power supplies v cc requires +5.0 v, 5%, regardless of the mode of operation. the supply current is determined by the ic's internal bias requirements and the total load current. the internally required current is a function of the load current and is shown in figure 7 for the differential mode. in the singleended mode, v ee must be 5.0 v, 5% in order to comply with eia423a standards. figures 12 and 13 indicate the internally required bias currents as a function of total load current (the sum of the four output loads). the discontinuity at 0 load current exists due to a change in bias current when the inputs are switched. the supply currents vary 2.0 ma as v cc and v ee are varied from ? 4.75 v ? to ? 5.25 v ? . sequencing of the supplies during powerup/ powerdown is not required. bypass capacitors (0.1 m f minimum on each supply pin) are recommended to ensure proper operation. capacitors reduce noise induced onto the supply lines by the switching action of the drivers, particularly where long p.c. board tracks are involved. additionally, the capacitors help absorb
mc26LS30 http://onsemi.com 10 transients induced onto the drivers' outputs from the external cable (from esd, motor noise, nearby computers, etc.). operating temperature range the maximum ambient operating temperature, listed as +85 c, is actually a function of the system use (i.e., specifically how many drivers within a package are used) and at what current levels they are operating. the maximum power which may be dissipated within the package is determined by: p dmax t jmax t a r ja where r q ja = package thermal resistance which is typically: 120 c/w for the soic (d) package, t jmax = max. allowable junction temperature (150 c) t a = ambient air temperature near the ic package. 1) differential mode power dissipation for the differential mode, the power dissipated within the package is calculated from: p d [(v cc v od ) i o ] (each driver) (v cc i b ) where: v cc = the supply voltage v od = is taken from figure 6 for the known value of i o i b = the internal bias current (figure 7) as indicated in the equation, the first term (in brackets) must be calculated and summed for each of the two drivers, while the last term is common to the entire package. note that the term (v cc v od ) is constant for a given value of i o and does not vary with v cc . for an application involving the following conditions: t a = +85 c, i o = 60 ma (each driver), v cc = 5.25 v, the suitability of the package types is calculated as follows. the power dissipated is: p d [3.0v 60 ma 2] (5.25 v 18 ma) p d 454 mw the junction temperature calculates to: t j 85 c (0.454 w 120 c
w) 139 c for the soic package. since the maximum allowable junction temperature is not exceeded in any of the above cases, either package can be used in this application. 2) singleended mode power dissipation for the singleended mode, the power dissipated within the package is calculated from: p d ( i b v cc ) ( i b v ee ) [( i o ( v cc v oh )]( each driver ) the above equation assumes i o has the same magnitude for both output states, and makes use of the fact that the absolute value of the graphs of figures 10 and 11 are nearly identical. i b + and i b are obtained from the right half of figures 12 and 13, and (v cc v oh ) can be obtained from figure 10. note that the term (v cc v oh ) is constant for a given value of i o and does not vary with v cc . for an application involving the following conditions: t a = +85 c, i o = 60 ma (each driver), v cc = 5.25 v, v ee = 5.25 v, the suitability of the package types is calculated as follows. the power dissipated is: p d 490 mw p d ( 24 ma 5.25 v ) ( 3.0 ma 5.25 v ) [ 60 ma 1.45 v 4.0 ] the junction temperature calculates to: t j 85 c (0.490 w 120 c
w) 144 c for the soic package. since the maximum allowable junction temperature is not exceeded in any of the above cases, either package can be used in this application.
mc26LS30 http://onsemi.com 11 system examples (pin numbers refer to so16 package only.) differential system an example of a typical eia422a system is shown in figure 17. although eia422a does not specifically address multiple driver situations, the mc26LS30 can be used in this manner since the outputs can be put into a high impedance mode. it is, however, the system designer's responsibility to ensure the enable pins are properly controlled so as to prevent two drivers on the same cable from being aono at the same time. the limit on the number of receivers and drivers which may be connected on one system is determined by the input current of each receiver, the maximum leakage current of each aoffo driver, and the dc current through each terminating resistor. the sum of these currents must not exceed the capability of the aono driver ( 60 ma). if the cable is of any significant length, with receivers at various points along its length, the common mode voltage may vary along its length, and this parameter must be considered when calculating the maximum driver current. the cable requirements are defined not only by the ac characteristics and the data rate, but also by the dc resistance. the maximum resistance must be such that the minimum voltage across any receiver inputs is never less than 200 mv. the ground terminals of each driver and receiver in figure 17 must be connected together by a dedicated wire (or the shield) in the cable to provide a common reference. chassis grounds or power line grounds should not be relied on for this common connection as they may generate significant common mode differences. additionally, they usually do not provide a sufficiently low impedance at the frequencies of interest. singleended system an example of a typical eia423a system is shown in figure 18. multiple drivers on a single data line are not possible since the drivers cannot be put into a high impedance mode. although each driver is shown connected to a single receiver, multiple receivers can be driven from a single driver as long as the total load current of the receivers and the terminating resistor does not exceed the capability of the driver ( 60 ma). if the cable is of any significant length, with receivers at various points along its length, the common mode voltage may vary along its length, and this parameter must be considered when calculating the maximum driver current. the cable requirements are defined not only by the ac characteristics and the data rate, but also by the dc resistance. the maximum resistance must be such that the minimum voltage across any receiver inputs is never less than 200 mv. the ground terminals of each driver and receiver in figure 18 must be connected together by a dedicated wire (or the shield) in the cable so as to provide a common reference. chassis grounds or power line grounds should not be relied on for this common connection as they may generate significant common mode differences. additionally, they usually do not provide a sufficiently low impedance at the frequencies of interest. additional modes of operation if compliance with eia422a or eia423a standard is not required in a particular application, the mc26LS30 can be operated in two other modes. 1) the device may be operated in the differential mode (pin 4 = 0) with v ee connected to any voltage between ground and 5.25 v. outputs in the low state will be referenced to v ee , resulting in a differential output voltage greater than that shown in figure 6. the enable pins will operate the same as previously described. 2) the device may be operated in the singleended mode (pin 4 = 1) with v ee connected to any voltage between ground and 5.25 v. outputs in the high state will be at a voltage as shown in figure 10, while outputs in a low state will be referenced to v ee . termination resistors transmission line theory states that, in order to preserve the shape and integrity of a waveform traveling along a cable, the cable must be terminated in an impedance equal to its characteristic impedance. in a system such as that depicted in figure 17, in which data can travel in both directions, both physical ends of the cable must be terminated. stubs leading to each receiver and driver should be as short as possible. in a system such as that depicted in figure 18, in which data normally travels in one direction only, a terminator is theoretically required only at the receiving end of the cable. however, if the cable is in a location where noise spikes of several volts can be induced onto it, then a terminator (preferably a series resistor) should be placed at the driver end to prevent damage to the driver. leaving off the terminations will generally result in reflections which can have amplitudes of several volts above v cc or several volts below ground or v ee . these overshoots/undershoots can disrupt the driver and/or receiver, create false data, and in some cases, damage components on the bus.
mc26LS30 http://onsemi.com 12 figure 17. eia422a example notes: 1. terminating resistors r t should be located at the physical ends of the cable. 2. stubs should be as short as possible. 3. receivers = am26ls32, mc3486, sn75173 or sn75175. 4. circuit grounds must be connected together through a dedicated wire. figure 18. eia423a example en ttl r am26ls32, mc3486, sn75173, or sn75175 ttl c c d - r t + mc26LS30 d ttl r d r d ttl ttl ttl d ttl d ttl ttl ttl en r twisted pair r t dr t en en ttl r en r ttl en ttl ttl r - r t + ttl r - r t + ttl r - r t + ttl c c d ttl c c d ttl c c d
mc26LS30 http://onsemi.com 13 package dimensions notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. 18 16 9 seating plane f j m r x 45 g 8 pl p b a m 0.25 (0.010) b s t d k c 16 pl s b m 0.25 (0.010) a s t dim min max min max inches millimeters a 9.80 10.00 0.386 0.393 b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.054 0.068 d 0.35 0.49 0.014 0.019 f 0.40 1.25 0.016 0.049 g 1.27 bsc 0.050 bsc j 0.19 0.25 0.008 0.009 k 0.10 0.25 0.004 0.009 m 0 7 0 7 p 5.80 6.20 0.229 0.244 r 0.25 0.50 0.010 0.019 so16 d suffix case 751b05 issue j
mc26LS30 http://onsemi.com 14 notes
mc26LS30 http://onsemi.com 15 notes
mc26LS30 http://onsemi.com 16 on semiconductor and are trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scill c data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthori zed use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. publication ordering information central/south america: spanish phone : 3033087143 (monfri 8:00am to 5:00pm mst) email : onlitspanish@hibbertco.com asia/pacific : ldc for on semiconductor asia support phone : 3036752121 (tuefri 9:00am to 1:00pm, hong kong time) toll free from hong kong & singapore: 00180044223781 email : onlitasia@hibbertco.com japan : on semiconductor, japan customer focus center 4321 nishigotanda, shinagawaku, tokyo, japan 1410031 phone : 81357402745 email : r14525@onsemi.com on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. mc26LS30/d north america literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 3036752175 or 8003443860 toll free usa/canada fax : 3036752176 or 8003443867 toll free usa/canada email : onlit@hibbertco.com fax response line: 3036752167 or 8003443810 toll free usa/canada n. american technical support : 8002829855 toll free usa/canada europe: ldc for on semiconductor european support german phone : (+1) 3033087140 (monfri 2:30pm to 7:00pm cet) email : onlitgerman@hibbertco.com french phone : (+1) 3033087141 (monfri 2:00pm to 7:00pm cet) email : onlitfrench@hibbertco.com english phone : (+1) 3033087142 (monfri 12:00pm to 5:00pm gmt) email : onlit@hibbertco.com european tollfree access*: 0080044223781 *available from germany, france, italy, england, ireland

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